Intel’s US$3.5B campus upgrade to boost next-gen chips

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Intel’s US$3.5B campus upgrade to boost next-gen chips

Intel plans to invest US$3.5 billion to upgrade its New Mexico manufacturing site with capabilities to produce next-generation processors that make use of the chipmaker’s Foveros 3D packaging technology – a crucial change in how Intel will make chips in the future.

The US$3.5 billion investment at Intel’s Rio Rancho, New Mexico, campus, announced Sunday during an interview with 60 Minutes and detailed in a Monday press conference, will create 700 high-tech jobs and 1,000 construction jobs while supporting 3,500 new jobs in the community, according to Intel. The company has begun planning activities and expects construction to begin in late 2021.

The announcement was made as part of Intel’s new IDM 2.0 hybrid manufacturing strategy that involves the expansion of internal manufacturing capacity, increased outsourcing with third-party foundries and the establishment of the new Intel Foundry Services. The company has already announced a US$20 billion plan to create two new fabs in Arizona, and over the weekend it announced a US$600 expansion plan in Israel.

Pat Gelsinger, Intel’s CEO, has previously said the new strategy will enable the chipmaker to return to “unquestioned leadership” as it faces tougher competition from rivals like AMD and Nvidia as well as companies that are turning to alternative architectures like Arm.

With the new investment, Intel’s Rio Rancho campus will gain the capability to make new kinds of processors that use Foveros, a new 3D packaging technology that allows the company to stack tiles of chips with different capabilities vertically across multiple layers. This is a major change from Intel’s long tradition of monolithic system-on-chip designs and will enable the company to mix and match tiles in a system-on-package design that has greater performance in a smaller footprint.

“Our Rio Rancho campus here is an important part of Intel’s global manufacturing network,” said Keyvan Esfarjani, senior vice president and general manager of manufacturing and operations at Intel, said at the press conference. “And with today’s announcement, our New Mexico operations are more even more critical and vital to Intel’s success.”

Intel’s Rio Rancho campus currently focuses on developing and manufacturing Intel Optane technology, silicon photonics technology and embedded multi-die interconnect bridge, or EMIB. The latter is Intel’s method for integrating chip tiles horizontally on a single package, and the company is using EMIB in combination with Foveros to develop new products.

One upcoming Intel product that uses Foveros and EMIB technologies is Ponte Vecchio, the chipmaker’s processor for high-performance computing AI that was originally announced as a GPU but is now referred to as an XPU, Intel’s term for heterogeneous computing.

With Foveros and EMIB, Intel is able to use different manufacturing processes, whether from the company’s own fabs or external foundries like TSMC, for different tiles on the package. Gelsinger has previously said this will be a key component of Intel’s IDM 2.0 strategy as it will allow the company to use the best manufacturing processes for different parts of new chip packages.

“Being able to expertly construct the best products using the best technologies is a critical differentiator for us and one that delivers enormous value for our customers,” Gelsinger said during Intel’s IDM 2.0 announcement in March.

For instance, Ponte Vecchio will consist of 47 tiles, but not all of the tiles will be manufactured on Intel’s own fabs or use the same manufacturing processes. Intel has previously said it will use its 10nm SuperFin and enhanced 10nm SuperFin processes for Ponte Vecchio’s base tile and Rambo Cache tile, respectively. But for Ponte Vecchio’s Xe Link tiles and some of the compute tiles, the company will rely on manufacturing processes from external foundries.

Intel’s first CPU to use Foveros will be Meteor Lake, which will debut in 2023 and feature a “breakthrough new x86 architecture and modular design,” as the company has previously teased.

This article originally appeared at

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